The present invention generally relates to power converters/power supplies, and more particularly relates to the sharing of load current between paralleled power converters/power supplies.
Power conversion circuits (hereinafter referred to as power supplies or power converters) are typically circuits designed to convert one direct current (DC) supply voltage level to a different DC supply voltage level, as may be required for a particular application. One application of a power conversion circuit, for example, is to supply DC power to a space satellite electronic communication system. In this type of application, where component size and weight are important factors, an improvement in the operating efficiency of a DC power source is a desirable objective, since an increase in efficiency may enable a reduction in the size and weight of the power source.
Two or more power converters are frequently connected in parallel when supplying power to a system due to load capacity considerations and/or packaging constraints. In addition, parallel combinations of power converters can provide a desired level of redundancy for high reliability applications such as power supplies in space satellites, where repair of a damaged power converter can be prohibitively expensive if not impossible.
Ideally, paralleled power converters are designed to share the current provided to the load equally. That is, it is desirable for each converter in a parallel power converter circuit to provide an approximately equal proportion of the total current provided to the load. In many practical applications, however, paralleled power converters frequently experience variations in their respective output voltages due to factors such as temperature coefficient, aging and output impedance differences, thereby making exact current matching between parallel converters relatively difficult to achieve.
The fraction of total load current supplied by each individual paralleled power converter is generally a function of (i.e. is dependent at least in part upon) the differences in output voltage and output impedance of the two (or more) power converters. Thus, when power converters are connected in parallel, the power converter having the higher output voltage typically supplies more current that then converter with a lower output voltage. In an extreme case, the converter with the higher output voltage may provide most, or possibly all, of the output load current. This unbalanced condition is made even worse if the power converter with the higher output voltage also has the lower output impedance of the two (or more) converters.
The unequal sharing of load current by paralleled power converters may degrade the performance and reliability of a power system. This problem is of particular concern when the power converters use synchronous rectification due to the inherent feedback properties of these circuits. In certain situations, it may be possible for a power converter having a lower output voltage than another converter to sink current from the other power converters, thereby further degrading the efficiency of the power circuit. This sink current is typically dependent upon the voltage difference between power converters, and by their output impedances.
In the absence of forced current sharing, power converters in a paralleled arrangement are often configured to operate in a current limit mode that prohibits the output current from exceeding a particular value. In such cases, a converter at a higher output voltage and/or lower output impedance frequently provides the maximum allowed current, with converters with lower output voltages and/or higher output impedances idling with relatively little or no output current, or worse, sinking current from the heavily-loaded power converters. The efficiency of the current-limited power converters is therefore relatively low due to I2R power loss, and the efficiency of the idling (sinking) power converters is effectively zero, since the sinking converter is delivering no power, but is consuming power. Effective current sharing will therefore generally improve the total efficiency of a paralleled power converter system.
Numerous techniques have been used in the past to implement current sharing. One current sharing technique involves manually adjusting the output voltages of paralleled power converters to be equal to each other in an effort to equalize current sharing. Current equalization is typically achieved at only one operating point and temperature however, unless the output impedances and temperature coefficients of the power converters are matched. Even in such cases, the matching can only be assured at the beginning of circuit life, and frequently degrades with time.
Another current sharing technique involves adjusting (e.g. adding) output impedances to force current sharing through voltage droop. This technique may be effective if output voltages are matched, but often results in a loss in efficiency.
Another current sharing technique forces current sharing by electronically adding an output voltage droop as a function of output current, by linearly adjusting the output voltage downward as a function of current. A disadvantage of this method is that the resultant excessive output voltage droop typically degrades the output voltage regulation.
Another current sharing method utilizes active load current sensing and correction, with active circuitry coupling each paralleled power converter with each other paralleled power converter. This method may be effective, but typically requires interconnecting signals between power converters, thereby complicating the circuit implementation, and making the reliability of the system dependent on the reliability of the interconnection.
Yet another current sharing technique utilizes a master and slave configuration, which generally requires two different configurations of power converters. This method also typically requires the interconnection of signals between power converters, making the reliability of the system dependent on the reliability of the interconnection.
Still another current sharing technique allows the converters to operate in current limit mode, as briefly mentioned above. In this case, as output current of a power converter reaches a current limit set point, the current limit control loop typically overrides the voltage regulation loop to prevent the current from exceeding the limit. As a result, the output current is regulated and the voltage regulation loop is no longer in exclusive control of the output. The power converter effectively becomes a high output impedance current source, thereby requiring load current and load transients to be absorbed by the remainder of the paralleled power converters. This arrangement also results in an increase in output impedance to the system.
Accordingly, it is desirable to provide an efficient current balancing circuit for paralleled power converters where output voltage regulation mode is maintained in conjunction with low output impedance. In addition, it is desirable to provide a current balancing circuit that eliminates the need for cross-coupling of current sense or current control signals between paralleled power converters. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description of the invention and the appended claims, taken in conjunction with the accompanying drawings and this background of the invention.
A current control circuit that forces current sharing among paralleled power converters includes a current amplifier biased with a reference voltage and having an input to a voltage error amplifier. The error amplifier maintains voltage regulation of a power converter via a voltage feedback signal from the output of the power converter. The error amplifier receives a signal from the current amplifier, depending on the biasing characteristics of a coupling circuit between the current amplifier output and the error amplifier input. The output current of the voltage regulated power converter is sensed, and a proportional signal is fed back to the current amplifier. When the sensed output current falls below a threshold level, as determined by the sensing circuit characteristics and the current amplifier reference voltage, the output signal of the current amplifier falls to a level that forward biases the coupling circuit. This enables the current amplifier output signal, via the coupling circuit, to influence the error amplifier input, such that the error amplifier output increases, causing an increase in the power converter output voltage, thus forcing an increase in output current.
In a paralleled arrangement of two or more power converters, an individual current control circuit, as described above, is associated with each of the paralleled power converters. As a result, each power converter is independently regulated to provide a minimum level of output current, based on a predetermined threshold value. In addition, the output voltage regulation mode is maintained, in conjunction with low output impedance. Moreover, cross-coupling of current sense or current control signals between paralleled power converters is not required.